Voltage generation circuits are utilized in many integrated circuits to generate voltages required for proper operation of the integrated circuit. For example, in a semiconductor memory device such as a dynamic random access memory (DRAM) a supply voltage VCC is applied to the device and a voltage generation circuit within the memory device generates a pumped voltage VCCP having a value greater than the supply voltage. In a DRAM, the pumped voltage VCCP is utilized, for example, in driving word lines of a memory-cell array when accessing rows of memory cells contained in the array, as will be appreciated by those skilled in the art. The value of the pumped voltage VCCP is greater than the supply voltage VCC so that capacitors in the memory cells may be charged to the supply voltage, as will once again be understood by those skilled in the art.
FIG. 1 is a functional block diagram and schematic illustrating a conventional voltage generation circuit 100 that may be utilized in a DRAM to generate a pumped voltage VCCP having a value greater than an applied supply voltage VCC. The voltage generation circuit 100 includes an oscillator 102 that generates an oscillator signal OSC in response to an enable signal EN applied by a Schmitt Trigger comparator 104. The oscillator 102 clocks the OSC signal when the EN signal is active and does not clock the OSC signal when the EN signal is inactive, instead maintaining the OSC signal either high or low. The OSC signal is applied to clock a charge pump circuit 106 which, in response to the OSC signal, generates the pumped voltage VCCP. More specifically, when the OSC signal clocks the charge pump circuit 106, the circuit turns ON and charges a load capacitor 108 to thereby develop the pumped voltage VCCP and drive a load resistance 109. When the OSC signal does not clock the charge pump circuit 106, the circuit turns OFF and stops charging the load capacitor 108. The detailed operation and circuitry for forming the oscillator 102 and charge pump circuit 106 are well understood by those skilled in the art, and thus, for the sake of brevity, these components will not be described in further detail.
The pumped voltage VCCP is applied through a diode-coupled PMOS transistor 110 and a level shifting circuit 112 to develop a pump feedback voltage VPF that is applied to a first input of the Schmitt Trigger comparator 104. The diode-coupled transistor 110 functions as a level shifter to reduce the value of the pumped voltage VCCP and ensure proper common-mode operation of the Schmitt Trigger comparator 104, as will be appreciated by those skilled in the art. The level shifting circuit 112 reduces the voltage from the diode-coupled transistor 110 by an offset voltage VOFF, which has a value determined, in part, by the desired value of the pump feedback voltage VPF. A current source 114 causes a desired current to flow through the diode-coupled transistor 110 and level shifting circuit 112 so that the feedback voltage VPF having the desired value is developed on the first input of the Schmitt Trigger comparator 104. A second input of the Schmitt Trigger comparator 104 receives a reference voltage VREF that is developed by a diode-coupled PMOS transistor 116 and a current source 118 coupled in series between the supply voltage VCC and ground. The diode-coupled transistor 116 functions as a level shifter to reduce the value of the supply voltage VCC and provide for proper common mode operation of the Schmitt Trigger comparator 104, as will be appreciated by those skilled in the art. The current source 118 causes a desired current to flow through the diode-coupled transistor 116 to develop the reference voltage VREF on the second input of the Schmitt Trigger comparator 104.
The voltage generation circuit 100 further includes over voltage protection components that attempt to limit the value of the pumped voltage VCCP as the supply voltage VCC increases. The overvoltage protection components include an overvoltage detector 120 that monitors the supply voltage VCC and develops an overvoltage signal OV having a value that is a function of the monitored supply voltage. The overvoltage signal OV is applied to an NMOS transistor 122 that is connected in series with a current source 124 and coupled between the second input of the Schmitt Trigger comparator 104 and ground. When the overvoltage signal OV has a sufficient magnitude, the transistor 122 turns ON causing current to flow through the transistor and current source 124 to ground. The transistor 122 and current source 124 together form a current limiting circuit 126 that operates during an overvoltage mode of the circuit 100, as will be described in more detail below. The overvoltage signal OV is further applied to a voltage clamping circuit 128 formed by an NMOS transistor 130 and diode-coupled transistor 132 coupled between the output of the charge pump 106 and the supply voltage VCC. When the overvoltage signal OV as a sufficient magnitude, the transistor 130 turns ON allowing current to flow through the diode-coupled transistor 132 and transistor to the supply voltage VCC to thereby clamp the pumped voltage VCCP.
During normal operation of the voltage generation circuit 100, the supply voltage VCC has a predetermined value and the overvoltage detector 120 drives the overvoltage signal OV sufficiently low to turn OFF the transistors 122 and 130. Thus, during normal operation the current limiting circuit 126 and clamping circuit 128 do not affect operation of the voltage generation circuit 100. In operation, the oscillator 102 applies the OSC signal to clock the charge pump 106 which, in turn, develops the pumped voltage VCCP. The pumped voltage VCCP is fed back through the diode-coupled transistor 110 and level shifting circuit 112 to develop the pump feedback voltage VPF. At this point, the current flowing through the diode-coupled transistor 116 as determined by the current source 118 develops the reference voltage VREF. As long as the pump feedback voltage VPF is less than the reference voltage VREF, the comparator drives the EN signal active, causing the oscillator 102 to clock the charge pump 106.
As the charge pump 106 operates, the pumped voltage VCCP increases to a point where the pumped voltage fed back through the diode-coupled transistor 110 and level shifting circuit 112 causes the pump feedback voltage VPF to exceed the reference voltage VREF. When the pump feedback voltage VPF is greater than the reference voltage VREF, the Schmitt Trigger comparator 104 deactivates the EN signal causing the oscillator 102 to stop clocking the charge pump 106 which, in turn, turns OFF. The charge pump 106 remains OFF until the pumped voltage VCCP discharges through a load resistance 109 and drops to a value causing the pump feedback voltage VPF to once again become less than the reference voltage VREF. When this occurs, the Schmitt Trigger comparator 104 once again activates the EN signal causing the oscillator 102 to clock the charge pump 106, which turns ON to once again begin charging the pumped output voltage VCCP.
When the supply voltage VCC increases, the overvoltage detector 120, current limiting circuit 126, and clamping circuit 128 operate in combination to limit the value of the pumped voltage VCCP. As the supply voltage VCC increases, the reference voltage VREF likewise increases, meaning that the pumped voltage VCCP similarly increases to thereby increase the feedback voltage VPF until it equals the increased reference voltage. When the supply voltage VCC exceeds a predetermined value, the overvoltage detector 120 activates the overvoltage signal OV, turning ON the transistors 122 and 130. When the transistor 130 turns ON, the pumped voltage VCCP is limited to a value above the supply voltage VCC determined by a small voltage drop across the transistor 130 plus the voltage drop across the diode-coupled transistor 132. Similarly, the turned ON transistor 122 and current source 124 attempt to sink current in parallel with the current source 118 to increase the voltage across transistor 116 and thereby limit the increase in the value of the reference voltage VREF. Ideally, the reference voltage VREF tracks the supply voltage VCC until the supply voltage exceeds the predetermined value which activates the overvoltage detector 120. This maintains a constant difference between the supply voltage VCC and the pumped voltage VCCP until the supply voltage exceeds the predetermined value. Ideally, once the supply voltage VCC exceeds the predetermined value, the reference voltage VREF is held constant, causing the pumped feedback voltage VPF to become greater than the reference voltage, which causes the Schmitt Trigger comparator 104 to deactivate the EN signal to thereby deactivate the oscillator 102 and turn OFF the charge pump 106. As will now be explained in more detail, the voltage generation circuit 100 does not, however, operate in this ideal manner.
The supply voltage VCC may increase, for example, during burn-in of an integrated circuit containing the voltage generation circuit 100. Typically, during burn-in the supply voltage VCC is increased to stress components contained within the integrated circuit, as will be understood by those skilled in the art. FIG. 2 is a graph illustrating the values of the pumped voltage VCCP, reference voltage VREF, and the overvoltage signal OV in the voltage generation circuit 100 as the supply voltage VCC increases. In the example of FIG. 2, the values of the supply voltage VCC and pumped voltage VCCP are initially two and three volts, respectively. At a time T1, the supply voltage VCC begins to increase and the pumped voltage VCCP and reference voltage VREF similarly begin increasing as illustrated. At this point, the overvoltage detector 120 is monitoring the supply voltage VCC but has not activated the overvoltage signal OV. Until a time T2, the reference voltage VREF tracks the supply voltage VCC to maintain a constant difference between the supply voltage and the pumped voltage VCCP. At the time T2, the overvoltage signal OV goes active, turning ON the current limiting circuit 126 and clamping circuit 128. Notwithstanding the activation of the circuits 126, 128, it is seen that the pumped voltage VCCP and the reference voltage VREF continue increasing after the time T2. This is true because due to physical limitations, such as heat dissipation and size limitations when forming components of the current source 124, the current limiting circuit 126 cannot sink enough current to limit the value of the reference voltage VREF as the supply voltage VCC increases. As a result, as the supply voltage VCC increases the pumped voltage VCCP and reference voltage VREF likewise increase.
In the voltage generation circuit 100, the pumped voltage VCCP may become so great as the supply voltage VCC increases that components of the integrated circuit containing the voltage generation circuit may be damaged. For example, the pumped voltage VCCP may exceed the breakdown voltages of various devices such as MOS transistors formed within the integrated circuit. Moreover, it should be noted that the clamping circuit 128 must dissipate what may be significant amounts of power as the pumped voltage VCCP increases and thus the voltage generation circuit 100 consumes wasted power and generates unwanted heat during the burn-in process.
There is a need for a voltage generation circuit that reliably limits the value of the pumped voltage as the supply voltage increases.